The programme is open to faculty of Engineering Colleges, MCA Colleges and other allied disciplines in India. Industry personnel working in the concerned /allied discipline can also attend.
• SoC-Design Verification-Trends, Challenges,
Opportunities
• Recent Trends in VLSI Physical Design and
Architecture for Smart loT devices
• Secrets of VLSI Physical Design & amp;
Challenges for IoT Design and IoT
Using Xilinx FPGA
• Embedded systems Role of Mentor Product
for Embedded Design and Challenges
in Embedded IoT Design
• Low Power Design Aspects of Embedded
IoT Devices
• IoT Value chain Demystified IoT Basics;
future Trends, Interfacing mechanism
• Role of IoT in Smart Automation
Duration: 6 Days
Start Date : 28th October - 2nd November, 2019
Last Date for Submission of application : 19th October, 2019
Venue: VIGNAN'S Institute of Engineering for Women, Visakhapatnam
Faculty and Research Scholars | Rs. 2500/- |
Industry Participants | Rs. 7500/- |
A filled-in form of application in the prescribed format duly signed and sponsored by appropriate authorities (along with demand draft) should reach the coordinator on or before the last date by post/courier. Participants are requested to write their name and contact number backside of demand draft. It is also mandatory to send scanned application form and demand draft through e-mail to sudhakar.jyo@gmail.com as selection will be intimated only through e-mail.
Accommodation will be provided to the selected outside participants on prior request. No TA/DA will be paid for the participants. Working Lunch, Tea & Snacks would be provided during the Training in the campus.
Head, Department of ECE
VIGNAN'S Institute of Engineering for Women
Kapujaggarajupeta, VSEZ (Post), Visakhapatnam,
Andhra Pradesh-530049, India.