The programme is open to the faculty of engineering colleges, degree colleges, MCA colleges and other allied disciplines in India.
Industry personnel working in the concerned/allied discipline can also attend.
• Basics of VLSI Design
• Scaling of MOSFET
and challenges
• Short Channel Effects
• Alternative Solution
of MOSFET
• Device Modeling
• Static and Dynamic
Circuits
• Low-Power VLSI
circuits
• FinFETs
• Vertical Nanowires
• Spintronics based
Devices to Circuits
• GNR Interconnects
• Hands on using
CADENCE and TCAD Tools
• Research issues
and suggestions
Duration: 6 Days
Start Date : 3 Dec 2018 – 8 Dec 2018
Last Date for Submission of application : 23/11/2018
Venue: E & ICT Academy, NIT Warangal
Faculty and Research Scholars | Rs. 2500/- |
Faculty of SC/ST Category | Rs. 1875/- (SC/ ST participants should submit their caste certificate to claim the concession along with application form) |
Industry Participants | Rs. 7500/- |
A filled-in form of application in the prescribed format duly signed and sponsored by appropriate authorities (along with demand draft) should reach the coordinator on or before the last date by post/courier. Participants are requested to write their name and contact number backside of demand draft. It is also mandatory to send scanned application form and demand draft through e-mail to narendarv@nitw.ac.in as selection will be intimated only through e-mail.
All the selected participants will be provided FREE boarding & lodging in the institute guest house. No TA will be paid for the participants.
Dr. Vadthiya Narendar
Assistant Professor
Dept. of Electronics and Communication Engg,
National Institute of Technology Warangal,
WARANGAL - 506 004, Telangana State, India.
Mobile: 9795235922, 9760018986
email: narendarv@nitw.ac.in/ satishm@nitw.ac.in