The programme is open to the faculty of engineering colleges, degree colleges, MCA colleges and other allied disciplines in India.
Industry personnel working in the concerned/allied discipline can also attend.
• Introduction to Nano-scale MOS modeling
• Nanowire, Multigate (MuG),
and tunneling based MOS devices
• Nano-scale Interconnects:
modeling the parasitics
• Post CMOS devices and interconnects
based on CNT's, GNR's and spintronics
• Integration methodologies:
TSVs, 3D, interconnects, NEMS
• Spintronic devices and non-volatile logic
• Basic illustration of SPICE with examples
• SRAM Design on SPICE
• Basic Illustration of TCAD with examples
• TCAD Simulation of advanced nanoscale devices
(Diode, MOSFET, 2D FinFET)
• Modeling and simulation of advanced
devices based on CNTs, GNR's
• Spintronic device simulation using OOMMF
Duration: 6 Days
Start Date : 17th – 22nd June, 2019
Last Date for Submission of application :8th June, 2019
Venue: E & ICT Academy, NIT Warangal
Faculty and Research Scholars | Rs. 2500/- |
Faculty of SC/ST Category | Rs. 1875/- (SC/ ST participants should submit their caste certificate to claim the concession along with application form) |
Industry Participants | Rs. 7500/- |
A filled in form of application in the prescribed format duly signed and sponsored by appropriate authorities (along with payment receipt) should reach the coordinator by speed-post. It is also mandatory to fill the following google form and selection will be intimated only through mail.
All the selected participants will be provided FREE boarding & lodging in the institute guest house. No TA will be paid for the participants.
Dr. Shivam Verma,
Dept. of Electronics and Communication Engg,
National Institute of Technology Warangal,
WARANGAL - 506 004, Telangana State, India.
Mobile: 7014681827, 9760018986
email: shivaver@nitw.ac.in, satishm@nitw.ac.in